Synplicity, Inc., supplier of software for the design and verification of semiconductors,  announced the expansion of its ESL software offering. Following the company's strategy of delivering technology-independent solutions, the new Synplify ® DSP ASIC Edition software allows users to automatically develop high-quality RTL code from designs specified at the algorithm level for implementation into either an FPGA or ASIC device. 

From a single model, the Synplify DSP ASIC Edition software can automatically implement optimized architectures of algorithms into either FPGA or ASIC devices. For teams developing ASICs, the combination of Synplify DSP ASIC Edition and Synplicity's ASIC verification product suite allows users to quickly verify their ASIC designs in FPGAs at high speed. By prototyping ASIC designs in FPGAs functional bugs can be detected more rapidly and more complex interactions can be observed due to the high operating speed (typically above 100 MHz) of the FPGA. 

Andy Haines, Sr.VP Marketing, Synplicity believes the performance and productivity benefits offered by this new software would make it the technology of choice when designers implement DSP capabilities into either FPGA or ASIC hardware. He further added that Synplify DSP software has been successful among FPGA users who have experienced significant quality of results benefits, and they were eager to bring the same capabilities to ASIC users. 

The software also supports third-party logic synthesis flows from Synopsys, Cadence and third-party ASIC memory IP providers. The Synplify DSP ASIC Edition software provides users with a fully integrated solution with standard ASIC flows. It is priced at $44,500 for a floating, one-year time-based license.

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